Functions
bool	WatchdogRunning (uint32_t ui32Base)

void	WatchdogEnable (uint32_t ui32Base)

void	WatchdogResetEnable (uint32_t ui32Base)

void	WatchdogResetDisable (uint32_t ui32Base)

void	WatchdogLock (uint32_t ui32Base)

void	WatchdogUnlock (uint32_t ui32Base)

bool	WatchdogLockState (uint32_t ui32Base)

void	WatchdogReloadSet (uint32_t ui32Base, uint32_t ui32LoadVal)

uint32_t	WatchdogReloadGet (uint32_t ui32Base)

uint32_t	WatchdogValueGet (uint32_t ui32Base)

void	WatchdogIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))

void	WatchdogIntUnregister (uint32_t ui32Base)

void	WatchdogIntEnable (uint32_t ui32Base)

uint32_t	WatchdogIntStatus (uint32_t ui32Base, bool bMasked)

void	WatchdogIntClear (uint32_t ui32Base)

void	WatchdogIntTypeSet (uint32_t ui32Base, uint32_t ui32Type)

void	WatchdogStallEnable (uint32_t ui32Base)

void	WatchdogStallDisable (uint32_t ui32Base)

Detailed Description

Introduction

The Watchdog Timer API provides a set of functions for using the MSP432E4 watchdog timer modules. Functions are provided to deal with the watchdog timer interrupts, and to handle status and configuration of the watchdog timer.

A watchdog timer module's function is to prevent system hangs. The watchdog timer module consists of a 32-bit down counter, a programmable load register, interrupt generation logic, and a locking register. Once the watchdog timer has been configured, the lock register can be written to prevent the timer configuration from being inadvertently altered.

The watchdog timer can be configured to generate an interrupt to the processor after its first timeout, and to generate a reset signal after its second timeout. The watchdog timer module generates the first timeout signal when the 32-bit counter reaches the zero state after being enabled; enabling the counter also enables the watchdog timer interrupt. After the first timeout event, the 32-bit counter is reloaded with the value of the watchdog timer load register, and the timer resumes counting down from that value. If the timer counts down to its zero state again before the first timeout interrupt is cleared, and the reset signal has been enabled, the watchdog timer asserts its reset signal to the system. If the interrupt is cleared before the 32-bit counter reaches its second timeout, the 32-bit counter is loaded with the value in the load register, and counting resumes from that value. If the load register is written with a new value while the watchdog timer counter is counting, then the counter is loaded with the new value and continues counting.

On some parts, there are two watchdog timers: one that is clocked by the system clock and a second that is clocked by PIOSC.

On some parts, the watchdog timer can be configured to generate an NMI instead of a standard interrupt. If the watchdog timer has been configured to generate an NMI, the interrupt is still treated the same as if it were a standard interrupt; it must be enabled in order to be triggered, and it must be cleared inside the NMI handler.

API Functions

The Watchdog Timer API is broken into two groups of functions: those that deal with interrupts, and those that handle status and configuration.

The Watchdog Timer interrupts are handled by the WatchdogIntRegister(), WatchdogIntUnregister(), WatchdogIntEnable(), WatchdogIntClear(), and WatchdogIntStatus() functions.

Status and configuration functions for the Watchdog Timer module are WatchdogEnable(), WatchdogRunning(), WatchdogLock(), WatchdogUnlock(), WatchdogLockState(), WatchdogReloadSet(), WatchdogReloadGet(), WatchdogValueGet(), WatchdogResetEnable(), WatchdogResetDisable(), WatchdogStallEnable(), and WatchdogStallDisable().

Programming Example

The following example shows how to set up the watchdog timer API to reset the processor after two timeouts.

//
// Enable the Watchdog 0 peripheral
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG0);
//
// Wait for the Watchdog 0 module to be ready.
//
while(!SysCtlPeripheralReady(SYSCTL_PERIPH_WDOG0))
{
}
//
// Check to see if the registers are locked, and if so, unlock them.
//
if(WatchdogLockState(WATCHDOG0_BASE) == true)
{
    WatchdogUnlock(WATCHDOG0_BASE);
}
//
// Initialize the watchdog timer.
//
WatchdogReloadSet(WATCHDOG0_BASE, 0xFEEFEE);
//
// Enable the reset.
//
WatchdogResetEnable(WATCHDOG0_BASE);
//
// Enable the watchdog timer.
//
WatchdogEnable(WATCHDOG0_BASE);
//
// Wait for the reset to occur.
//
while(1)
{
}

Function Documentation

§ WatchdogRunning()

bool WatchdogRunning ( uint32_t ui32Base )

Determines if the watchdog timer is enabled.

Parameters

ui32Base is the base address of the watchdog timer module.

This function checks to see if the watchdog timer is enabled.

Returns: Returns true if the watchdog timer is enabled and false if it is not.

References ASSERT, HWREG, WDT_CTL_INTEN, and WDT_O_CTL.

§ WatchdogEnable()

void WatchdogEnable ( uint32_t ui32Base )

Enables the watchdog timer.

Parameters

ui32Base is the base address of the watchdog timer module.

This function enables the watchdog timer counter and interrupt.

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_CTL_INTEN, and WDT_O_CTL.

§ WatchdogResetEnable()

void WatchdogResetEnable ( uint32_t ui32Base )

Enables the watchdog timer reset.

Parameters

ui32Base is the base address of the watchdog timer module.

This function enables the capability of the watchdog timer to issue a reset to the processor after a second timeout condition.

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_CTL_RESEN, and WDT_O_CTL.

§ WatchdogResetDisable()

void WatchdogResetDisable ( uint32_t ui32Base )

Disables the watchdog timer reset.

Parameters

ui32Base is the base address of the watchdog timer module.

This function disables the capability of the watchdog timer to issue a reset to the processor after a second timeout condition.

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_CTL_RESEN, and WDT_O_CTL.

§ WatchdogLock()

void WatchdogLock ( uint32_t ui32Base )

Enables the watchdog timer lock mechanism.

Parameters

ui32Base is the base address of the watchdog timer module.

This function locks out write access to the watchdog timer registers.

Returns: None.

References ASSERT, HWREG, WDT_LOCK_LOCKED, and WDT_O_LOCK.

§ WatchdogUnlock()

void WatchdogUnlock ( uint32_t ui32Base )

Disables the watchdog timer lock mechanism.

Parameters

ui32Base is the base address of the watchdog timer module.

This function enables write access to the watchdog timer registers.

Returns: None.

References ASSERT, HWREG, WDT_LOCK_UNLOCK, and WDT_O_LOCK.

§ WatchdogLockState()

bool WatchdogLockState ( uint32_t ui32Base )

Gets the state of the watchdog timer lock mechanism.

Parameters

ui32Base is the base address of the watchdog timer module.

This function returns the lock state of the watchdog timer registers.

Returns: Returns true if the watchdog timer registers are locked, and false if they are not locked.

References ASSERT, HWREG, WDT_LOCK_LOCKED, and WDT_O_LOCK.

§ WatchdogReloadSet()

void WatchdogReloadSet	(	uint32_t	ui32Base,
		uint32_t	ui32LoadVal
	)

Sets the watchdog timer reload value.

Parameters

ui32Base	is the base address of the watchdog timer module.
ui32LoadVal	is the load value for the watchdog timer.

This function configures the value to load into the watchdog timer when the count reaches zero for the first time; if the watchdog timer is running when this function is called, then the value is immediately loaded into the watchdog timer counter. If the ui32LoadVal parameter is 0, then an interrupt is immediately generated.

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, and WDT_O_LOAD.

§ WatchdogReloadGet()

uint32_t WatchdogReloadGet ( uint32_t ui32Base )

Gets the watchdog timer reload value.

Parameters

ui32Base is the base address of the watchdog timer module.

This function gets the value that is loaded into the watchdog timer when the count reaches zero for the first time.

Returns: None.

References ASSERT, HWREG, and WDT_O_LOAD.

§ WatchdogValueGet()

uint32_t WatchdogValueGet ( uint32_t ui32Base )

Gets the current watchdog timer value.

Parameters

ui32Base is the base address of the watchdog timer module.

This function reads the current value of the watchdog timer.

Returns: Returns the current value of the watchdog timer.

References ASSERT, HWREG, and WDT_O_VALUE.

§ WatchdogIntRegister()

void WatchdogIntRegister	(	uint32_t	ui32Base,
		void(*)(void)	pfnHandler
	)

Registers an interrupt handler for the watchdog timer interrupt.

Parameters

ui32Base	is the base address of the watchdog timer module.
pfnHandler	is a pointer to the function to be called when the watchdog timer interrupt occurs.

This function does the actual registering of the interrupt handler. This function also enables the global interrupt in the interrupt controller; the watchdog timer interrupt must be enabled via WatchdogEnable(). It is the interrupt handler's responsibility to clear the interrupt source via WatchdogIntClear().

See also: IntRegister() for important information about registering interrupt handlers.

Note: The Watchdog timer module has the ability to generate an NMI instead of a standard interrupt. This function registers the standard watchdog interrupt handler. To register the NMI watchdog handler, use IntRegister() to register the handler for the FAULT_NMI interrupt.

Returns: None.

References ASSERT, INT_WATCHDOG, IntEnable(), and IntRegister().

§ WatchdogIntUnregister()

void WatchdogIntUnregister ( uint32_t ui32Base )

Unregisters an interrupt handler for the watchdog timer interrupt.

Parameters

ui32Base is the base address of the watchdog timer module.

This function does the actual unregistering of the interrupt handler. This function clears the handler to be called when a watchdog timer interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

See also: IntRegister() for important information about registering interrupt handlers.

Note: The Watchdog timer module has the ability to generate an NMI instead of a standard interrupt. This function unregisters the standard watchdog interrupt handler. To unregister the NMI watchdog handler, use IntUnregister() to unregister the handler for the FAULT_NMI interrupt.

Returns: None.

References ASSERT, INT_WATCHDOG, IntDisable(), and IntUnregister().

§ WatchdogIntEnable()

void WatchdogIntEnable ( uint32_t ui32Base )

Enables the watchdog timer interrupt.

Parameters

ui32Base is the base address of the watchdog timer module.

This function enables the watchdog timer interrupt.

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_CTL_INTEN, and WDT_O_CTL.

§ WatchdogIntStatus()

uint32_t WatchdogIntStatus	(	uint32_t	ui32Base,
		bool	bMasked
	)

Gets the current watchdog timer interrupt status.

Parameters

ui32Base	is the base address of the watchdog timer module.
bMasked	is false if the raw interrupt status is required and true if the masked interrupt status is required.

This function returns the interrupt status for the watchdog timer module. Either the raw interrupt status or the status of interrupt that is allowed to reflect to the processor can be returned.

Returns: Returns the current interrupt status, where a 1 indicates that the watchdog interrupt is active, and a 0 indicates that it is not active.

References ASSERT, HWREG, WDT_O_MIS, and WDT_O_RIS.

§ WatchdogIntClear()

void WatchdogIntClear ( uint32_t ui32Base )

Clears the watchdog timer interrupt.

Parameters

ui32Base is the base address of the watchdog timer module.

The watchdog timer interrupt source is cleared, so that it no longer asserts.

Note: Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted). This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_O_ICR, and WDT_RIS_WDTRIS.

§ WatchdogIntTypeSet()

void WatchdogIntTypeSet	(	uint32_t	ui32Base,
		uint32_t	ui32Type
	)

Sets the type of interrupt generated by the watchdog.

Parameters

ui32Base	is the base address of the watchdog timer module.
ui32Type	is the type of interrupt to generate.

This function sets the type of interrupt that is generated if the watchdog timer expires. ui32Type can be either WATCHDOG_INT_TYPE_INT to generate a standard interrupt (the default) or WATCHDOG_INT_TYPE_NMI to generate a non-maskable interrupt (NMI).

When configured to generate an NMI, the watchdog interrupt must still be enabled with WatchdogIntEnable(), and it must still be cleared inside the NMI handler with WatchdogIntClear().

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WATCHDOG_INT_TYPE_INT, WATCHDOG_INT_TYPE_NMI, WDT_CTL_INTTYPE, and WDT_O_CTL.

§ WatchdogStallEnable()

void WatchdogStallEnable ( uint32_t ui32Base )

Enables stalling of the watchdog timer during debug events.

Parameters

ui32Base is the base address of the watchdog timer module.

This function allows the watchdog timer to stop counting when the processor is stopped by the debugger. By doing so, the watchdog is prevented from expiring (typically almost immediately from a human time perspective) and resetting the system (if reset is enabled). The watchdog instead expires after the appropriate number of processor cycles have been executed while debugging (or at the appropriate time after the processor has been restarted).

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_O_TEST, and WDT_TEST_STALL.

§ WatchdogStallDisable()

void WatchdogStallDisable ( uint32_t ui32Base )

Disables stalling of the watchdog timer during debug events.

Parameters

ui32Base is the base address of the watchdog timer module.

This function disables the debug mode stall of the watchdog timer. By doing so, the watchdog timer continues to count regardless of the processor debug state.

Note: This function has no effect if the watchdog timer has been locked.

Returns: None.

References ASSERT, HWREG, WDT_O_TEST, and WDT_TEST_STALL.