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MSP432E4 DriverLib API Guide
1.11.00.03
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Functions | |
| void | FPUEnable (void) |
| void | FPUDisable (void) |
| void | FPUStackingEnable (void) |
| void | FPULazyStackingEnable (void) |
| void | FPUStackingDisable (void) |
| void | FPUHalfPrecisionModeSet (uint32_t ui32Mode) |
| void | FPUNaNModeSet (uint32_t ui32Mode) |
| void | FPUFlushToZeroModeSet (uint32_t ui32Mode) |
| void | FPURoundingModeSet (uint32_t ui32Mode) |
The floating-point unit (FPU) driver provides methods for manipulating the behavior of the floating-point unit in the Cortex-M processor. By default, the floating-point is disabled and must be enabled prior to the execution of any floating-point instructions. If a floating-point instruction is executed when the floating-point unit is disabled, a NOCP usage fault is generated. This feature can be used by an RTOS, for example, to keep track of which tasks actually use the floating-point unit, and therefore only perform floating-point context save/restore on task switches that involve those tasks.
There are three methods of handling the floating-point context when the processor executes an interrupt handler: it can do nothing with the floating-point context, it can always save the floating-point context, or it can perform a lazy save/restore of the floating-point context. If nothing is done with the floating-point context, the interrupt stack frame is identical to a Cortex-M processor that does not have a floating-point unit, containing only the volatile registers of the integer unit. This method is useful for applications where the floating-point unit is used by the main thread of execution, but not in any of the interrupt handlers. By not saving the floating-point context, stack usage is reduced and interrupt latency is kept to a minimum.
Alternatively, the floating-point context can always be saved onto the stack. This method allows floating-point operations to be performed inside interrupt handlers without any special precautions, at the expense of increased stack usage (for the floating-point context) and increased interrupt latency (due to the additional writes to the stack). The advantage to this method is that the stack frame always contains the floating-point context when inside an interrupt handler.
The default handling of the floating-point context is to perform a lazy save/restore. When an interrupt is taken, space is reserved on the stack for the floating-point context but the context is not written. This method keeps the interrupt latency to a minimum because only the integer state is written to the stack. Then, if a floating-point instruction is executed from within the interrupt handler, the floating-point context is written to the stack prior to the execution of the floating-point instruction. Finally, upon return from the interrupt, the floating-point context is restored from the stack only if it was written. Using lazy save/restore provides a blend between fast interrupt response and the ability to use floating-point instructions in the interrupt handler.
The floating-point unit can generate an interrupt when one of several exceptions occur. The exceptions are underflow, overflow, divide by zero, invalid operation, input denormal, and inexact exception. The application can optionally choose to enable one or more of these interrupts and use the interrupt handler to decide upon a course of action to be taken in each case.
The behavior of the floating-point unit can also be adjusted, specifying the format of half-precision floating-point values, the handle of NaN values, the flush-to-zero mode (which sacrifices full IEEE compliance for execution speed), and the rounding mode for results.
The FPU API provides functions for enabling and disabling the floating-point unit (FPUEnable() and FPUDisable()), for controlling how the floating-point state is stored on the stack when interrupts occur (FPUStackingEnable(), FPULazyStackingEnable(), and FPUStackingDisable()), for handling the floating-point interrupt (FPUIntRegister(), FPUIntUnregister(), FPUIntEnable(), FPUIntDisable(), FPUIntStatus(), and FPUIntClear()), and for adjusting the operation of the floating-point unit (FPUHalfPrecisionModeSet(), FPUNaNModeSet(), FPUFlushToZeroModeSet(), and FPURoundingModeSet()).
The following example shows how to use the FPU API to enable the floating-point unit and configure the stacking of floating-point context.
| void FPUEnable | ( | void | ) |
Enables the floating-point unit.
This function enables the floating-point unit, allowing the floating-point instructions to be executed. This function must be called prior to performing any hardware floating-point operations; failure to do so results in a NOCP usage fault.
References HWREG, NVIC_CPAC, NVIC_CPAC_CP10_FULL, NVIC_CPAC_CP10_M, NVIC_CPAC_CP11_FULL, and NVIC_CPAC_CP11_M.
| void FPUDisable | ( | void | ) |
Disables the floating-point unit.
This function disables the floating-point unit, preventing floating-point instructions from executing (generating a NOCP usage fault instead).
References HWREG, NVIC_CPAC, NVIC_CPAC_CP10_DIS, NVIC_CPAC_CP10_M, NVIC_CPAC_CP11_DIS, and NVIC_CPAC_CP11_M.
| void FPUStackingEnable | ( | void | ) |
Enables the stacking of floating-point registers.
This function enables the stacking of floating-point registers s0-s15 when an interrupt is handled. When enabled, space is reserved on the stack for the floating-point context and the floating-point state is saved into this stack space. Upon return from the interrupt, the floating-point context is restored.
If the floating-point registers are not stacked, floating-point instructions cannot be safely executed in an interrupt handler because the values of s0-s15 are not likely to be preserved for the interrupted code. On the other hand, stacking the floating-point registers increases the stacking operation from 8 words to 26 words, also increasing the interrupt response latency.
References HWREG, NVIC_FPCC, NVIC_FPCC_ASPEN, and NVIC_FPCC_LSPEN.
| void FPULazyStackingEnable | ( | void | ) |
Enables the lazy stacking of floating-point registers.
This function enables the lazy stacking of floating-point registers s0-s15 when an interrupt is handled. When lazy stacking is enabled, space is reserved on the stack for the floating-point context, but the floating-point state is not saved. If a floating-point instruction is executed from within the interrupt context, the floating-point context is first saved into the space reserved on the stack. On completion of the interrupt handler, the floating-point context is only restored if it was saved (as the result of executing a floating-point instruction).
This method provides a compromise between fast interrupt response (because the floating-point state is not saved on interrupt entry) and the ability to use floating-point in interrupt handlers (because the floating-point state is saved if floating-point instructions are used).
References HWREG, NVIC_FPCC, NVIC_FPCC_ASPEN, and NVIC_FPCC_LSPEN.
| void FPUStackingDisable | ( | void | ) |
Disables the stacking of floating-point registers.
This function disables the stacking of floating-point registers s0-s15 when an interrupt is handled. When floating-point context stacking is disabled, floating-point operations performed in an interrupt handler destroy the floating-point context of the main thread of execution.
References HWREG, NVIC_FPCC, NVIC_FPCC_ASPEN, and NVIC_FPCC_LSPEN.
| void FPUHalfPrecisionModeSet | ( | uint32_t | ui32Mode | ) |
Selects the format of half-precision floating-point values.
| ui32Mode | is the format for half-precision floating-point value, which is either FPU_HALF_IEEE or FPU_HALF_ALTERNATE. |
This function selects between the IEEE half-precision floating-point representation and the Cortex-M processor alternative representation. The alternative representation has a larger range but does not have a way to encode infinity (positive or negative) or NaN (quiet or signaling). The default setting is the IEEE format.
References HWREG, NVIC_FPDSC, and NVIC_FPDSC_AHP.
| void FPUNaNModeSet | ( | uint32_t | ui32Mode | ) |
Selects the NaN mode.
| ui32Mode | is the mode for NaN results; which is either FPU_NAN_PROPAGATE or FPU_NAN_DEFAULT. |
This function selects the handling of NaN results during floating-point computations. NaNs can either propagate (the default), or they can return the default NaN.
References HWREG, NVIC_FPDSC, and NVIC_FPDSC_DN.
| void FPUFlushToZeroModeSet | ( | uint32_t | ui32Mode | ) |
Selects the flush-to-zero mode.
| ui32Mode | is the flush-to-zero mode; which is either FPU_FLUSH_TO_ZERO_DIS or FPU_FLUSH_TO_ZERO_EN. |
This function enables or disables the flush-to-zero mode of the floating-point unit. When disabled (the default), the floating-point unit is fully IEEE compliant. When enabled, values close to zero are treated as zero, greatly improving the execution speed at the expense of some accuracy (as well as IEEE compliance).
References HWREG, NVIC_FPDSC, and NVIC_FPDSC_FZ.
| void FPURoundingModeSet | ( | uint32_t | ui32Mode | ) |
Selects the rounding mode for floating-point results.
| ui32Mode | is the rounding mode. |
This function selects the rounding mode for floating-point results. After a floating-point operation, the result is rounded toward the specified value. The default mode is FPU_ROUND_NEAREST.
The following rounding modes are available (as specified by ui32Mode):
References HWREG, NVIC_FPDSC, and NVIC_FPDSC_RMODE_M.